Like digital to analog converters or DACs, the analog to digital converter or ADC is everywhere.
A while back, I published an article on DACs titled Digital to Analog Converters – An Introductory Tutorial. I strongly advise you check it out before reading this article if you haven’t already.
There are a few reasons for this. First, some analog to digital converters use DACs as part of their makeup. Second, a lot of the specs that apply to DACs also apply to analog to digital converters. Finally, ADCs are more complicated, but a good understanding of DACs can help you better understand how ADCs work.
Like the DAC post, this one is introductory, so we won’t cover every analog to digital converter that exists; rather I’ll discuss the most common ones in use today. And, as before, we won’t go into huge detail about how these ADCs work, but we will cover the basics.
How the Analog to Digital Converter Works
Analog to Digital Conversion 101
Sometimes, I start my posts with an interesting historical tidbit. This one will be no exception.
Toward that end, according to the Data Conversion Handbook by Walt Kester, the first commercial ADC showed up on the scene in 1954. The 11-bit device weighed 154 lbs. (70 kg) and slurped up at least 500 watts of power, often times more. It sold for $8,500 at the time which, according to some online inflation calculators, translates to more the $80,700 in 2019 dollars. Technology certainly has come a long way, hasn’t isn’t it?
That’s enough history for now, let’s talk about how ADCs work.
An analog to digital converter or ADC, transforms analog information in electrical form into digital data. In other words, an ADC takes a continuous analog input signal and converts it into a binary number which a computer or microcontroller can work with.
Often, the analog to digital converters you’ll work with are part of the microcontroller or board of choice but ADCs in separate IC packages are available for certain applications.
By the way, if you’re not 100% sure what the difference between digital and analog is, I urge you to see Analog vs Digital: What’s the Difference?
I’ll assume you know the difference from here on.
Analog signals continuously vary with time, so to convert an analog signal into digital form an ADC must sample the analog signal at a certain rate or frequency.
This rate is governed by the Nyquist theorem.
The Nyquist theorem says that to avoid any loss of information the sampling rate must be at least twice as high as the highest frequency component we expect to see in the analog signal we’re sampling. Explaining why the Nyquist theorem works and finding frequency components of signals involves a lot of high-level math which is beyond the scope of this article, but perhaps a future post will cover the Nyquist sampling theorem in a bit more detail.
Figures 1 and 2 offer a basic graphical depiction of sampling an analog signal.
Figure 1: sampling an analog signal. The time in between samples is the sampling period.
Figure 2: if we connect the samples in figure 1 with horizontal lines, we’ll get a staircase like this (in red). Notice how it sort of has the same shape as the sine wave (in blue). If we take more samples and reduce the sampling period, the red signal will get smoother and look more like the original sine wave.
Now that we have some general info on analog to digital converters, let’s go over the most common ones around today.
Types of Analog to Digital Converters
Also known as the simultaneous or parallel analog to digital converter, the flash ADC gets its name from its main strength — speed.
The flash method uses comparators that compare reference voltages with the analog input voltage.
Figure 3 depicts a diagram of a 3-bit flash analog to digital converter.
Figure 3: a typical 3-bit flash ADC.
As we can see, the circuit consists of a resistive voltage divider, seven analog comparators, a priority encoder, and an output latch.
The voltage divider in figure 3 has a total resistance of 8R. The resistors are picked to produce seven equally-spaced reference voltages (i.e. Vref/16, 3Vref/16, 5Vref/16 . . . 15Vref/16 with each being separated by Vref/8). Each reference voltage feeds the inverting input of a comparator.
The comparator outputs a HIGH if the voltage at its noninverting (or +) input is higher than the voltage at the inverting (or -) input. If the inverting input voltage is greater than the noninverting input voltage, the comparator output goes LOW.
The analog voltage (Va in figure 3) is applied to the noninverting inputs of all comparators simultaneously, so if Va exceeds the reference voltage of a particular comparator that comparator’s output goes HIGH.
This all seems wonderful, but flash analog to digital converters have one major drawback…
In general, a flash ADC requires 2n-1 comparators to convert an analog signal to an n-bit binary code. The flash ADC in figure 3 only needs seven comparators, however, most applications call for an ADC with a higher resolution.
Let’s say we want a more practical flash ADC that has a 10-bit resolution. Applying our formula from above tells us that this one requires 1,023 comparators!
Manufacturing high resolution flash analog to digital converters quickly becomes unwieldy and expensive. This is because putting analog circuits on silicon isn’t always easy. This is a big disadvantage.
Regardless, flash converters with 10-or-more-bit resolutions are available.
Successive Approximation ADC
Out of the ADCs this article covers, the successive approximation analog to digital converter is one of the more popular ones. In fact, these converters are often integrated into microcontrollers. This is likely because this ADC has a faster conversion time than the other methods with the exception of the flash ADC. However, the successive approximation converter is easier to implement in silicon (one comparator vs many) than the flash converter, as we now know.
The basic idea behind it is something a computer programmer may be familiar with – the binary search.
Assume the analog voltage we want to convert is within a well-defined range of binary numbers, say 0 to 255. A binary search narrows down progressively smaller binary fractions of the range of numbers.
So, staying with the assumption that the analog value will yield a binary number from 0 to 255, we can find the value of the said number in no more than eight tries since 28 = 256.
The first approximation will determine which half of the range the number is in. The second iteration finds which half of that half (or which quarter), the third finds the eighth and so on until we run out of bits and get an answer.
Let’s do a quick example to clarify this concept. We’ll find the value of a number from 0 to 127. Let’s say the answer is 44, but the ADC doesn’t know that yet, so we’ll call it x for now.
We’ll converge on the answer by asking a series of yes or no questions. Ready?
Step 1: The number is either in the upper or lower half of the range, so we cut the range in half:
Is x ≥ 64? Nope, so 0 ≤ x ≤ 63.
Step 2: Cut remaining range in half: 0-31 and 32-63.
Is x ≥ 32? Yep, so 32 ≤ x ≤ 63
Step 3: Cut remaining range in half again: 32-47 and 48-63.
Is x ≥ 48? No way, so 32 ≤ x ≤ 47.
Step 4: Cut remaining range in half again (you knew we’d do that, didn’t you?): 32-39 and 40-47.
Is x ≥ 40? Hell yeah, so 40 ≤ x ≤ 47.
Step 5: Rinse and repeat: 40-43 and 44-47.
Is x ≥ 44? You bet, so 44 ≤ x ≤ 47.
Step 6: Halvies again: 44-45 and 46-47.
Is x ≥ 46? Not a chance, so 44 ≤ x ≤ 45.
Step 7: cut ‘er in half one more time: 44 or 45.
Is x ≥ 45? Nah, so x = 44.
Notice how it took us exactly seven tries to converge on an answer because 27 = 128.
Figure 4 depicts what something like this may look like if you hooked an oscilloscope to a successive approximation ADC during a conversion.
Figure 4: ADC scope output. Notice how the output bounces up and down with each try or iteration until the ADC converges on an answer at the end.
Before we go any further, let’s have a peek at a block diagram of a successive approximation analog to digital converter.
Figure 5: simplified block diagram of a successive approximation ADC.
One of the first things to notice about figure 5 is that successive approximation analog to digital converters contain a digital to analog converter (DAC). This may sound odd, but we’ll see why in a minute.
The following gives a basic description of how this device works.
First, the input bits of the DAC are set to 1 one at a time, starting with the most significant bit (MSB). As each bit is enabled, the comparator produces an output that indicates whether the analog input voltage is more or less than the output of the DAC. If the DAC output is greater, the comparator’s output goes LOW, which causes the bit in the successive approximation register to reset (become LOW or 0).
If the DAC’s output is less than the analog input, the bit in the register stays at 1 or HIGH. This process starts with the MSB first, then the next most significant bit, then the next and so on. After the comparator tests all the bits of the DAC’s output (ending with the least significant bit or LSB) the conversion cycle completes.
Dual Slope ADC
Dual slope ADCs often find their way into digital multimeters, audio applications and more.
The name of this analog to digital converter comes from the fact that the integrator output changes linearly over time, with two different slopes during the conversion process. You’ll see what I mean shortly.
An integrator is a relatively simple op amp-based circuit. Its output accumulates the sum of all previous input values. Think of the integrator as a ramp generator. Figure 6 depicts such a circuit.
Figure 6: a basic op amp integrator.
Going into detail about the dual slope ADC’s method of operation requires some understanding of calculus (after all, it uses an integrator) which is beyond the scope of this post.
However, I will attempt to give a basic overview of how this thing works. Take a peek at figure 7 for this discussion.
Figure 7: dual slope analog to digital converter block diagram.
First, a quick lesson on op amps and integrators.
Remember that no current flows into the terminals of an ideal op amp. Also, the voltage on both terminals is the same. Notice that the positive input of the integrator in figure 7 is at ground. Because of this, the negative terminal is also at zero volts. This is known as a virtual ground.
Rather than flowing into the op amp, the current flows into the capacitor, charging it up over time. This creates a line or a ramp.
Let’s move on to the rest of the block diagram.
Before conversion starts, an auto-zero circuit sets the comparator output to 0.
Next, the analog input voltage causes the integrator output to ramp up (this is the first slope from figure 8 below). As soon as the integrator voltage becomes non-zero, the comparator enables a counter via the control logic.
When that counter overflows, (flips to all zeros again because it can’t go any higher, like an odometer on a high mileage car), the integrator input is switched from the analog input voltage to -Vref. This causes the integrator output to move toward zero (the second, negative-going slope). The counter keeps counting (starting from zero after overflow) and when the integrator output hits zero the comparator disables it. The counter now contains the digital equivalent of the analog voltage.
This works because the integrator output operates for a known time during the initial phase. This produces an output proportional to the input voltage. During the second phase, the output goes to zero at a known rate, reaching zero in a time proportional to the final voltage of the first phase.
For those who like quick, easy to understand answers, what follows is the abridged version of the dual slope ADC’s operation. The dual slope analog to digital converter is based on counting the number of clock pulses during a capacitor charging process. If you forget everything else we covered so far, remember that.
Figure 8 shows the integrator’s output during conversion. It’s easy to see where the dual slope ADC got its name from.
Figure 8: its easy to see how this ADC got its name. The left half of the diagram depicts the integrator’s output during the first phase. The equation for the slope is also shown. The right part is the output of the integrator during the second phase. T is the time during the first phase and tx represents the time during the second phase.
The explanation on how it works may seem intimidating at first, but believe it or not, this ADC is simple and inexpensive. They are also very accurate and are able to reject noise. Since the parameters of the RC circuit in the integrator do not enter into the dual slope’s output, the stability of these components doesn’t matter much. Things like temperature and age can affect resistors and capacitors, but this converter is self-compensating. In fact, the clock frequency doesn’t even have to be highly stable.
One short-coming is its relatively slow speed. This is mainly because the integration time is longer than it takes for, say, a successive approximation ADC to do its thing. Another disadvantage is that the dual slope ADC sports a conversion time that directly depends on the magnitude of the input signal.
One of the newer kids on the block, the sigma-delta analog to digital converter boasts conversions with very high accuracy. It also goes by the ∑-∆ ADC for the corresponding Greek letters. Some people transpose the letters and refer to it as the delta-sigma converter.
For those who don’t know, the Greek letter sigma (∑) is the symbol for summation. Delta (∆) is the Greek letter representing change. So, one can think of sigma-delta as a sum of changes.
Sigma-delta ADCs are also starting to show up in microcontrollers because they require a minimum of precision components thus making them are easier to realize in silicon.
Figure 9 shows a typical simplified sigma-delta ADC block diagram.
Figure 9: typical simplified delta-signa ADC block diagram. The summing junction is often a difference amp. Also note the presence of an integrator and a DAC.
Sigma-delta converters are unusual in that their output is a serial stream of bits rather than a multi-bit parallel value. But it is this property that enables them to produce a highly accurate digital output up to 24 bits that parallel converters (like the flash ADC) simply cannot attain.
Also, noise levels can be kept very low with the use of digital filtering (not shown in figure 9). This can, however, be a double edge sword and can be a disadvantage for high-speed conversion due to the need for other high-speed digital circuits to achieve this.
Sigma-delta ADCs can be confusing, but I’ll do my best to explain them. What follows is the basic gist of how a sigma-delta analog to digital converter works.
The circuit starts by integrating an input value and sending 1 or 0 to the DAC (via the comparator) depending on the integrator’s output relative to ground. The comparator generates a 1 if the input signal has increased. If it has decreased, it generates a 0. The DAC has two reference voltages (not shown in figure 9): +Vref and -Vref. It takes the comparator’s output and switches one of the two reference voltages into the summing junction (which is usually a difference amplifier). The difference amp (or summing junction in figure 9) subtracts the DAC’s output from the input voltage and feeds this to integrator.
In other words, the integrator sums the previous changes introduced by the DAC in the circuit’s feedback loop. This continues for a certain number of iterations and each iteration generates a bit in the serial output stream. The number of 1s in this stream is proportional to the fraction of full scale that represents the analog input voltage.
Hold it Now! Practical Analog to Digital Converters
For the sake of easier explanation, we’ve been assuming that the analog input voltage to the ADCs we’ve covered is constant.
But many analog signals are not constant. The problem with this is that in order for an ADC to work correctly and give us an accurate result the input signal needs to be constant or very slowly varying.
This is because the conversion process is not instantaneous and takes a finite amount of time. The incoming analog signal might be changing at a rate higher than the ADC conversion rate.
The answer to this is something called a sample and hold circuit.
This is becoming a long post, so I won’t go into any great detail of how they work. The basic gist is that they sample the input at periodic intervals and hold the value long enough for the conversion to take place.
Sample and hold circuitry is almost always necessary. Let’s quickly gloss over an example to prove it. I won’t bore you with the details on how I got the answer, so you’ll just have to trust me.
Say we have a 12-bit successive approximation ADC without a sample and hold circuit. Assume it takes 1 microsecond for each of the 12 steps needed for the complete conversion. This gives us a total conversion time of 12 microseconds.
Let’s make the input a sine wave of constant frequency. Without the sample and hold, our ADC is limited to a frequency of only about 3 Hz even though it only takes 12 microseconds to do a conversion! This is clearly impractical for many applications.
The take-away: you probably need a sample and hold circuit if it isn’t already built into your ADC.
Wrapping up Analog to Digital Converters
I’m starting to feel a case of information overload coming on and we haven’t even talked about ADC performance specs or choosing the right ADC. Nor did we go into great detail on Nyquist or about how the ADCs in this article work.
And of course, there are other types of ADCs that we didn’t even discuss.
Yep, like most topics concerning electronics there’s a lot more to say about analog to digital converters, but I’ll save that for later.
In the future we’ll delve into the above topics and maybe some related topics like digital filtering and more detail on sample and hold circuits.
Meanwhile, drop a comment and tell me about your latest microcontroller-driven project. Are you using the ADC? What sort of analog data are you trying to measure and manipulate?
I’d love to hear about it!